This report covers the fifth quarter of a program aimed at fully realizing the potential of GaAs for digital integrated circuits employing depletion mode MESFETs. During this reporting period the processing of wafers with mask set AR6 containing the SD2FL 8 x 8 parallel multiplier has continued. DC parametric testing has shown good FET and diode characteristics and yield, as well as good results in terms of other process related parameters. Studies of the effects of impurity contamination on implanted layers characteristics have shown that wafer contamination by Si, Au, or Cr during the post-implant anneal can lead to detrimental implant compensation. Reliability studies on ring oscillators have confirmed the progress made with the adoption of an Au-Ge/Ni ohmic contact metalization scheme. Modeling efforts of MESFETs have continued.